The most common problem with the DG-5 to date has been associated with the RCA type jacks. The majority of the DG-5's we have received here for repair have had dirty center pins on the jacks. The cause appears to be excessive rosin from soldering running into the center pin.
The standard repair has been to clean the center pin with solvent. Another possible problem is a cold solder connection at the RCA jack. You should also chack the interconnecting cables for continuity. This should take care of about 90% of the DG-5 repairs you will See.
Reparing DG-5
Author: Trio-Kenwood Communication, inc.
Above are common mechanical failures that occure with DG-5. We suggest the following troubleshooting procedure:
Note: Operation of the circuits are essential before proceeding.
It's been Kenwood's experience that when problems do occure with the DG-5 that spproximately 90% of the problem will be caused by insufficent solder connectiond and not the actual components themselves.
Note: We suggest the following procedure if BUFFERS, MIXERS and OSCILLATORS are working properly: See service manual for proper levels.
Check
Service suggestions:
A heat gun and freeze spray often are very effective in locating cold or non-plated thru holes.
The DG-5 is a dynamic display type frequency counter. All this means is that fewer wires and decode drivers are needed for frequency displaying.
We shall start the explanation of the DG-5 with the reference osc. (Q21). This circuit provides the timing pulses, calibration and scanning pulses for operation of the DG-5. The ten MHz ref. osc. is divided 1/10 by IC5 to provide calibrated one MHz output. It is then further divided by IC6 and IC7 1/100. The divided signal is then passed thru IC8 which consists of two sections, a 1/5 amd 1/2 divider. The divide by 1/5 section now gives a resultant 2KHz signal on its output. This is the scanning pulse. IC40 receives the scanning pulse which is a decode driver (Neg. Logic Type) is used to switch Q25-Q30 via terminals T1-T6 to put a plus voltage on display D1-D3 (LED Type).
At the same time, outputs T1-T6 of IC41 are inverted by IC42 positive logic and the B.C.D information is presented to IC32-IC37 the and-orinvert gates which provide the conditional inputs for the multiplexer or distributor. IC38 provides Neg. Logic inversion for IC39, the decode driver.
The multiplexer information starts with the heterodyne of three components, ref. osc., carrier and VFO input signals.
IC26-IC31 are the multiplexer inputs. These are latches which store B.C.D informationuntil they are told to release their output by IC3 the strobe or latch signal.
I will mention now, that if the HET or VFO input signal are absebt, that the blanking circuits will take effect. At this time the HET input is amplified and is wave-shaped by the Schmidt Trigger IC1 and IC1B. The carrier outputis then mixed with the belance mixer Q16 and Q17. Its output is then mixed again with VFO and its output appears on Q18 drain. Its buffered by Q19 and waved-shaped by IC2B. This output is placed on timing window IC2C. Two signals are presented to the timing window; 1) signal to be measured, 2) gating signal .1 sec. in length (IC11 pin 8).
The DG-5 contains two window circuits IC2C and IC1C. IC1C forms the HET counter window circuit and IC2C forms the preset counter circuit.
With a gate signal the HET counter begins to count the pulses which pass thru the gate, and se does the preset counter circuit. The outputs of the timing windows are a ratio of signal input divided by gate pulse. Example, with a .1 sec. gating pulse the display would be updated once ever .2 sec period. If a 1.2MHz input was measured, the display would read "1200" in KHz. The gated output information of IC1C is then distributed on the HET counters IC-12-IC18. At this time it should be realized that IC41 the decode driver is used merely to supply a puls voltage to display and is controlled by 2 KHz scaning pulse. IC2D is gated with the same . 1 sec. pulse and the output signal to be measured is the ratio of signal input (VFO. ref. and carrier) divided by gate pulse.
Both HET and preset B.C.D. information is presented to latch circuits which is then sent to decode driver IC39 for display information. Since only one decode driver is being used for all displays, the conditional inputs of IC32-IC37 must be turned "on" and "off" quickly in order not to be detectable by the human eye. This is done easily by the high speed TTL circuits.
Note: The display scheme of the DG-1 and DG-5 are essentially the same. The theory of operation is therefore applicable to the DG-1 display as well.
DG-5 Standard service procedure
Author: Trio-Kenwood Communication, inc.
Introduction
A majority DG-5 failures are caused by nothing more than an intermittent opening of a plated-through hole connecting top and bottom foil paths of the PC Board.
Before any component level service is attemted, it is advisable to eliminate the possibility of an intermittent connection causing or complicating Counter failure.
Procedure:
How to solder on the DG-5 PC Board
Through hole accounting
Display unit - 2
Counter unit - 82
Total 84
Locations:
Adjacent or between; | IC3, 13-14, 15-16, 22-23 IC1-2, 6, 18 IC12 | - 1 each - 2 each - 3 each |
Located between rows; | IC13-18, 20-25 20-25, 26-31 IC26-31, 32-37 IC32-37, 38-39 | - 5 - 10 - 15 - 25 |
At rear panel; | FS7805 regulator 2SD235 transistor | - 1 - 3 |
Additional Point
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